In recent years, power MOSFETs (Metal-oxide-semiconductor field-effect transistors) have increased channel density to reduce channel resistance, thereby reducing on-resistance. However, the increase in channel density due to the miniaturization tends to cause thermal runaway to narrow a safe operating area (SOA). For this reason, it is desired to improve the tradeoff between the widening of the safe operating area and the reduction of the on-resistance in semiconductor devices provided with MOSFETs and the like.